D9.6: Final plan to disseminate and use the foreground knowledge

In this deliverable, we examined the overall heterogeneous computing market, trends, and players in order to determine potential effective approaches and strategies that form good bases for exploitation and dissemination of results achieved during REPARA work. The heterogeneous processing and Continue reading D9.6: Final plan to disseminate and use the foreground knowledge

D9.3: Report on Initial Project Web Site

This report describes the initial website design, including the public website (available at http://www.repara-project.eu) and the project internal website, as well as other internet based dissemination means. Results reported in this deliverable will influence the approach for dissemination and public Continue reading D9.3: Report on Initial Project Web Site

D4.4: Source code transformations for fine grained parallelism

This document describes deliverable D4.4. Source code transformations for fine grained parallelism, which is part of task T4.3. The deliverable’s results specify the transformation of annotated REPARA C++ code to FastFlow pipeline and DSP/FPGA source code. Those transformations are realized as Continue reading D4.4: Source code transformations for fine grained parallelism

D5.3: Optimized multi-threaded mapping to reconfigurable hardware

The ThreadPoolComposer (TPC) tool has been refined to support the automated insertion of custom-generated (non-Vivado HLS) IP cores into the thread-pool of hardware processing elements. This not only allows the use of highly optimized cores formulated in traditional hardware design Continue reading D5.3: Optimized multi-threaded mapping to reconfigurable hardware