D3.6: Qualitative Models for Performance and Energy Efficiency

This document contains the detailed description of our concept of the qualitative partitioning model. Using source code metrics produced by static analysis, our model is able to predict the computing unit that allows the fastest or most energy efficient execution of a Continue reading D3.6: Qualitative Models for Performance and Energy Efficiency

D3.2: Target Platform Description Extraction Tool

This report summarizes the target platform description extraction tool developed as part of  of the REPARA project. The REPARA report D3.1 (Target Platform Description Specification) introduces the target platform description language (HPP-DL) itself. The purpose of HPP-DL is to allow creating a standard description Continue reading D3.2: Target Platform Description Extraction Tool

D3.1: Target Platform Description Specification

Heterogeneous Parallel Platform Description Language (HPP-DL) is a specification of a description language to provide all the relevant details of heterogeneous parallel platform. These heterogeneous platforms could be formed by: multicore, GPGPU, FPGA or DSP, or combinations of all of them. HPP-DL enables Continue reading D3.1: Target Platform Description Specification