D5.1: Compile flow for behavioral transformation to reconfigurable hardware

This report introduces the compile flow for behavioral transformation to reconfigurable hardware. It describes the automated compilation flow of isolated C/C++ kernels to hardware thread-pools and their integration into higher-level run-times on the software-side.

In the context of the REPARA project, this prototype deliverable builds on the results of Source code transformations for coarse grained parallelism, specifically the Kernel Extraction Plugin that extracts the marked kernels and their data structure in the original application to separate compilation units in C/C++ that is compliant with the restrictions for FPGAs as defined in REPARA C++ Open Specification. It is also closely related to the REPARA static run-times for coordination in heterogeneous platforms.

ICT-609666-D5.1

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